For example, a latch circuit using the differential switching scheme similar to that of ECL is described in Japanese Patent Application Laid-Open Publication No. 5-259830 (Patent Document 1). A differential amplifier which is a component of this latch circuit has a two-stage structure in which a bipolar transistor for data input and a current source are connected from a high-potential power source toward a low-potential power source. Furthermore, another bipolar transistor is provided in parallel to this bipolar transistor and it is controlled in accordance with a clock signal. By this means, it becomes possible to switch the active state and the inactive state (cutoff) of the bipolar transistor for data input. When such a structure is used, the switching between an active state and an inactive state of the bipolar transistor for data input can be smoothly performed, and the midpoint noise due to the switching can be reduced.
Also, Japanese Patent Application Laid-Open Publication No. 2003-283309 (Patent Document 2) describes a flip-flop circuit including a differential amplifier and a source follower circuit having one output of the differential amplifier as an input thereof, in which a source of the source follower circuit is connected to a current source via a MOS transistor having the other output of the differential amplifier circuit as an input thereof. This differential amplifier has a three-stage structure in which a MOS transistor for data input, a MOS transistor for clock input, and a current source are connected from a high-potential power source toward a low-potential power source. When such a structure is used, it is possible to sufficiently acquire the output current of the source follower circuit, which makes it possible to achieve the high-speed operation.